Hardware Protocols

Planned chapters

• A — UART. Asynchronous framing and baud agreement, the frame format, framing/parity/overrun errors, and flow control.
• B — I2C. The two-wire open-drain bus and why pull-ups are required, START/STOP conditions, 7-bit addressing, ACK/NACK, a full register read/write transaction, clock stretching, and multi-master arbitration.
• C — SPI. The four wires, the shift-register full-duplex model, the four CPOL/CPHA modes, multi-slave chip-select, and SPI vs. I2C head to head.
• D — The Rest of the Map. A UART-vs-I2C-vs-SPI comparison table, CAN at a concept level, USB at a very light level, and GPIO discipline (push-pull vs. open-drain, pull-ups, debouncing).